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Anglický jazyk
Source-Synchronous Networks-On-Chip
Autor: Ayan Mandal
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result,... Viac o knihe
Na objednávku
104.49 €
bežná cena: 109.99 €
O knihe
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
- Vydavateľstvo: Springer
- Rok vydania: 2016
- Formát: Paperback
- Rozmer: 235 x 155 mm
- Jazyk: Anglický jazyk
- ISBN: 9781493948178
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